Model

A single-phase full-bridge IGBT inverter, fed from an ideal DC link, drives an LC filter with a resistor across the capacitor (Figure 1). The output voltage is compared with a 50 Hz reference; the error goes through a PR controller, is normalized by 1/311, limited to ±1 and fed to the PWM generator. Two breakers connect a non-linear load (diode bridge with a capacitive DC stage) at 0.2 s and a linear series RLC load at 0.4 s.

The resonance frequency and quality factor of the filter are

The resonance sits only 2.25 times above the fundamental. That single fact explains most of what follows.

Results

Open loop: saturation plus resonance

With the feedback disconnected, the reference goes straight through the controller. At 50 Hz the PR gain is K_p + K_r = 6, so the modulator is driven six times beyond its limit and the inverter produces an almost square voltage (Figure 2, top). Its fundamental is about V. Because 50 Hz is close to the filter resonance, the filter amplifies it by

which predicts a fundamental of about 555 V. The simulation gives 575 V, with peaks of about 660 V and a THD of 20 %.

Load steps: flat-topping

The rectifier draws current only near the voltage peaks, and the controller, tuned only at 50 Hz, does not correct the resulting harmonics. The voltage flattens at the top (Figure 3): THD rises to 9.7 % with the rectifier, and to 16.5 % when the RLC load is added. The fundamental stays at 278–279 V throughout.

Almost all the distortion is third harmonic (Figure 4): about 9.5 % of the fundamental with the rectifier and about 16.4 % with both loads.

Does the loop reject the harmonics? No: it amplifies them

A fair way to answer this is to compare the closed loop with a true open loop: no feedback, no resonant term, and a fixed modulation index (0.638) that gives the same 278 V fundamental. With the rectifier connected, the open loop has a THD of 4.0 %; the closed loop, 9.7 %. The third harmonic grows from 3.8 % to 9.5 % of the fundamental (Figure 5).

The loop gain explains why. Above the filter resonance (112.5 Hz), the LC filter inverts the phase of the signal. At the third harmonic the loop gain becomes negative, T(3f₁) ≈ −1.46, so the proportional feedback turns into positive feedback. The sensitivity function, which tells how much the loop multiplies a disturbance, is greater than one at every characteristic harmonic:

Loop gain and sensitivity at the fundamental and at the characteristic harmonics, from the model parameters.

Harmonic	Loop gain T	|1/(1+T)|	Effect of the loop
1st (50 Hz)	8.41	0.11	reduces the error to 11 %
3rd (150 Hz)	−1.46	2.10	amplifies about 2×
5th (250 Hz)	−0.29	1.40	amplifies
7th (350 Hz)	−0.13	1.15	amplifies slightly

The simulation agrees: the third-harmonic voltage per ampere of third-harmonic load current is 2.3 times higher in closed loop than in open loop. In this design, then, the loop neither damps the harmonics nor compensates them. Note also that for a single-phase rectifier the dominant harmonic is the third, not the 5th and 7th typical of three-phase bridges.

The DC voltage of the rectifier load follows the flattened peak (Figure 6): it jumps to about 360 V at connection, when the discharged capacitor charges through the filter, and settles at about 236 V with both loads.

Discussion

• Place the filter resonance well away from the fundamental. Here it sits at 2.25 × f₁, where it amplifies the fundamental and any low-order harmonic, and falls inside the bandwidth the controller has to handle. A common design guideline places it roughly between 10 × f₁ and half the switching frequency. With the same inductor, that means a much smaller capacitor.
• A non-ideal PR does not guarantee zero error. Its gain at the fundamental is finite and sets the steady-state error, as the calculation above shows. Raising K_r or reducing ω_c brings the output closer to the reference, at the cost of stability margin and sensitivity to frequency deviations.
• Non-linear loads need harmonic control, and a filter that allows it. A PR tuned only at 50 Hz does not compensate the harmonics; with the resonance below the third harmonic, this loop amplifies them. The usual remedy is to add resonant terms at the 3rd, 5th and 7th harmonics, but those terms only work if the loop keeps enough phase margin at those frequencies, which again depends on where the filter resonance sits.
• This is voltage control, not active damping. The closed loop suppresses the open-loop oscillation, but active damping usually refers to specific techniques, such as capacitor-current feedback or a virtual resistor, that add damping to the LC resonance itself. That is a natural next step for this model.

Limitations

• The DC link is an ideal source; a real one would sag during the load steps.
• Switches are ideal and there is no dead time.
• The carrier frequency (27 × 60 Hz) and some powergui settings come from a 60 Hz template. They do not change the conclusions, but a revised model should use values chosen for a 50 Hz system.

Model

A full bridge fed from 350 V DC is driven by bipolar sinusoidal PWM with a 20 kHz carrier and a modulation index of 1 (Figure 1). Its output goes through an inductor, an ideal 1:1 transformer and a second inductor to a 30 µF capacitor. A 10 Ω load is connected at 0.5 s.

Results

The resonance

The filter resonance and its characteristic impedance are

The spectrum of the capacitor voltage without load has exactly two components: the 50 Hz fundamental and a line at 502 Hz (Figure 2). The oscillation is the filter’s free response, excited when the inverter starts at t = 0 with the filter discharged. The 20 kHz switching is 40 times above the resonance and the filter attenuates it strongly.

Why it doesn’t stop

The only damping comes from the parasitic elements. Referred to a series resistance at 502 Hz they add up to about 4.7 mΩ, which gives

With a time constant of 1.4 s, the oscillation should lose about a quarter of its amplitude in 0.4 s. The simulation agrees: the 502 Hz component falls from 289 V to 223 V between the first and the fifth 100 ms window (Figure 3).

What the load does

Connecting 10 Ω across the capacitor lowers the quality factor to about R/Z₀ ≈ 0.95. The oscillation is gone within a cycle, and the output settles at 335 V peak with a THD of 1.6 % (Figure 4). The peaks flatten slightly because with m = 1 the sine reaches the carrier peak.

Discussion

The severe behavior is not caused by operating at no load. It is the response of an uncompensated converter-filter system: an LC with almost no damping, excited by the start-up and with no control acting on it. Real converters avoid it with some combination of:

• passive damping, a resistor in the filter branch, at the cost of losses;
• active damping, usually feedback of the capacitor current or a virtual resistor in the control;
• soft start, ramping the voltage up instead of applying it at once;
• closed-loop control of the output voltage;
• and, when grid-connected, the damping provided by the grid impedance and other loads.

Which one is needed, and how much, depends on the filter design, the control and the strength of the grid.

Limitations

• Open-loop modulation, ideal DC source and ideal switches.
• The ideal transformer does not model magnetizing current or saturation.
• The result depends on the start-up conditions: a different starting angle or a soft start changes the initial amplitude of the oscillation, not its frequency or decay.

Model

A three-phase source with a grounded star feeds three phases through a weak LV line (Figure 1). Each phase has an R-L load; a single-phase rectifier is connected to phase B and returns to ground through an explicit neutral impedance Z_N. At 0.20 s phase B opens, and at 0.21 s its node is tied to phase A.

Results

With the rectifier on phase B

The three R-L loads are balanced, so their currents cancel in the neutral. What remains is the rectifier current: the neutral carries 6.9 A of fundamental and 3.8 A of third harmonic, a THD of 57 % (Figure 2, left). The third harmonic is more than half of the fundamental.

After the transfer to phase A

Phase A now feeds its own load, the load of the B node and the rectifier; phase B carries nothing. The imbalance raises the neutral fundamental to 15.6 A, while the third harmonic stays at 3.6 A, because it still comes from the same single rectifier (Figure 3). The THD drops to 23 %, not because there is less harmonic current, but because the fundamental grew.

Voltage at the load

With 4 Ω of line per phase, the node that feeds the rectifier drops to 285 V peak (fundamental) against 299 V at a node with only the R-L load, and shows a voltage THD of 2.8 %, almost all third harmonic (Figure 4). The rectifier return current, about 12 A peak, also raises the voltage across Z_N to about 12 V peak.

Discussion

• The neutral carries two different currents. The fundamental component depends on how balanced the phases are; the triplen harmonics depend on the non-linear loads. A transfer that worsens the balance can multiply the first without changing the second, as in this case.
• Triplen harmonics add up in the neutral. Third harmonics from loads on different phases are in phase with each other, so they add instead of cancelling. With a single rectifier, the neutral simply carries all of its third harmonic. With one rectifier per phase, the neutral third harmonic would be about three times larger even with perfectly balanced loads. That is the natural next case to simulate.
• Neutral point displacement needs a weak neutral. In this model the source star is solidly grounded and the loads return directly to ground, so the star point does not move. Studying displacement and overvoltages on lightly loaded phases requires modeling the neutral conductor itself, with its impedance, along the feeder.

Limitations

• The neutral impedance is modeled only in the rectifier return; the R-L loads return directly to ground.
• At t = 0 the neutral current shows a 3.1 kA spike lasting a single time step (1 µs). It is an initialization artifact (the DC capacitor starts charged while the rest of the circuit starts at zero) and is excluded from the analysis.
• One rectifier; no interaction between several non-linear loads.

Model

The network is a typical urban LV supply (Figure 1): a 13.2 kV source, a 315 kVA Dyn transformer, 200 m of aluminium cable, and a LV bus with one R-L load per phase. A single-phase full-bridge rectifier with a capacitive DC stage is connected to phase A. At 0.60 s the phase-A switch opens and, at 0.61 s, a transfer switch connects the node to phase B.

Results

Harmonic content

The rectifier only draws current near the voltage peaks. The current of phase A has a fundamental of 21.1 A plus 9.0 A of third, 6.2 A of fifth and 3.2 A of seventh harmonic: a THD of 55 % (Figure 2, Figure 3).

The voltage barely notices. At the LV bus the voltage THD is 0.7 %: with a 315 kVA transformer and 200 m of cable, the network is stiff and the harmonic currents produce small voltage drops.

After the transfer, phase B carries its own load plus the transferred one: its current rises from 12.2 A to 32.6 A (fundamental) with a THD of 35 %, and phase A drops to zero.

The transfer itself

Two details of the transfer only show up in the simulation (Figure 4):

• The switch does not open at 0.60 s. Like a real breaker, the ATP switch interrupts at the next current zero, which comes at 608.8 ms. The load is left without supply for only 1.2 ms.
• What hurts the load is the phase jump, not the interruption. At 0.61 s the node reconnects to a voltage shifted by −120°. The DC capacitor, which only recharges when the supply voltage exceeds its own, keeps discharging until phase B’s voltage catches up. The DC bus falls from its normal 255–295 V ripple to 227 V at 616 ms. The first recharge then draws a 52 A peak from phase B, against 45 A in steady state.

Discussion

• For capacitor-input loads, the reconnection instant matters more than the speed. Interrupting at current zero, as any breaker or static switch does, is clean. The dip comes from reconnecting to a voltage that is, at that instant, below the DC bus voltage. Choosing the reconnection instant, for example when the target phase is near its peak, would reduce both the dip and the inrush.
• The load moves its harmonics with it. In a stiff network the voltage hardly changes, but the current of the receiving phase nearly triples in this case. Automatic phase balancing has to consider both the fundamental and the harmonic content of what it moves.

Limitations

• The MV source is ideal and the cable is modeled with positive-sequence parameters only.
• Switches are ideal: they open at current zero, with no arc.
• During the 1.2 ms without supply, the isolated node shows numerical ringing in the voltage trace; it does not affect the rest of the results.
• One rectifier and one transfer event; aggregate effects of many loads were not studied.